This paper presents a study of the losses in the integrated buck-flyback converter (IBFC) used as highpower-factor LED driver. The aim of the study is to investigate the possibilities of increasing the efficiency of the IBFC converter. The procedure of the improvement is done by obtaining the equations of the current through each component in terms of converter parameters.
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A flyback power factor corrector (PFC) using a series pass module (SPM) to shape its input current is presented. The input current is profiled by the SPM with its waveform controlled to be in the same wave shape and phase with the supply voltage and its magnitude controlled to regulate the output voltage.
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A variable switching frequency space vector modulation control method is proposed in this paper. It is used to achieve zero voltage switching (ZVS) for two parallel 180° interleaved three-phase grid-connected voltage source inverters (VSI) at unity power factor.
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At present there is expanding requests of high power component and low total harmonic distortion (THD) in the current drawn from the source. Additionally there is a necessity of good power quality.
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A new series hybrid DC-DC converter targeting for communication power supply with wide input range is designed in this paper implemented with Silicon Carbic (SiC) power transistor. The proposed hybrid converter is a combination of forward and flyback converter with full usage of transformer energy and optimized efficiency.
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The power supply chain of data centers from the medium voltage (MV) utility grid down to the chip level voltage consists of many series connected power conversion stages and accordingly shows a relatively low efficiency.
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This work introduces a novel modeling approach that allows to obtain fast simulations of PWM DC–DC Switched Mode Power Supplies (SMPS). The proposed methodology combines the use of precise switched models during transient evolutions and averaged models during steady state or slowly varying conditions.
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In this paper an algorithm for finding two-phase step-down switched-capacitor converter topologies is presented. The output stage is considered as a number of nodes, namely ground, input, output, and the top and bottom plates of the capacitors.
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This paper proposes a low-power delta–sigma capacitance-to-digital converter (CDC) for a capacitive sensor. The input of the capacitive sensor employs a zoomed-in technique with the offset capacitor to extend the input capacitance range.
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